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  1 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 rev.: e amendment: /0 issue date: october 2009 description provides crosspoint switching between any input pair to any output pair guaranteed ac performance over temperature and voltage: ? dc to >5gbps throughput ? <350ps propagation delay ? <60ps t r / t f times ? <25ps skew (output-to-output) unique, patent-pending, channel-to-channel isolation design provides superior crosstalk performance ultra-low jitter design: ? <1ps rms random jitter ? <10ps pp deterministic jitter ? <10ps pp total jitter (clock) ? <0.7ps rms crosstalk-induced jitter unique, patent-pending, 50? input termination extended cmvr, and vt pin accepts dc- and ac- coupled differential inputs 400mv cml output swing 50? source terminated outputs minimize round-trip refections power supply 2.5v 5% or 3.3v 10% C40c to +85c temperature range available in 44-pin (7mm 7mm) mlf ? package pb-free green package features ultra precision 4 4 cml switch with internal i/o termination precision edge ? sy58040u applications data communication systems all sonet/sdh data/clock applications all fibre channel applications all gigabit ethernet applications the sy58040u is a low jitter, low skew, high-speed 44 crosspoint switch optimized for precision telecom and enterprise server/storage distribution applications. the sy58040u distributes clock frequencies from dc to 4ghz, and data rates to 5gbps guaranteed over temperature and voltage. the sy58040u differential input includes micrels unique, 3-pin input termination architecture that directly interfaces to any differential signal (ac- or dc-coupled) as small as 100mv (200mv pp ) without any level shifting or termination resistor networks in the signal path. the outputs are 50? source-terminated cml with extremely fast rise/fall times guaranteed to be less than 60ps. the sy58040u features a patent-pending isolation design that signifcantly improves on channel-to-channel crosstalk performance. the sy58040u operates from a 2.5v 5% or 3.3v 10% supply and is guaranteed over the full industrial temperature range of C40c to +85c. the sy58040u is part of micrels high-speed, precision edge ? product line. datasheets and support documentation can be found on micrels web site at: www.micrel.com. precision edge is a registered trademark of micrel, inc. mlf and micro leadframe are registered trademarks of amkor technology, inc. precision edge ?
2 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 functi onal block diagram q0 /q0 q1 /q1 sin0 (cmos/ttl) sin1 (cmos/ttl) sout0 (cmos/ttl) in0 /in0 v t0 50w 50w v ref-ac0 0 1 2 3 in1 /in1 v t1 50 ? 50 ? v ref-ac1 0 1 2 3 q2 /q2 in2 /in2 v t2 50 ? 50 ? v ref-ac2 0 1 2 3 q3 /q3 in3 /in3 v t3 50 ? 50 ? v ref-ac3 0 1 2 3 control logic sout1 (cmos/ttl) conf (cmos/ttl) load (cmos/ttl) truth tables input select address table sin1 sin0 input 0 0 in0 0 1 in1 1 0 in2 1 1 in3 output select address table sout1 sout0 output 0 0 q0 0 1 q1 1 0 q2 1 1 q3
3 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 pac kage/ordering i nformation ordering information (1) package operating package lead part number type range marking finish sy58040umi mlf-44 industrial sy58040u sn-pb sy58040umitr (2) mlf-44 industrial sy58040u sn-pb sy58040umy (3) mlf-44 industrial sy58040u pb-free pb-free bar-line indicator matte-sn sy58040umytr (2, 3) mlf-44 industrial sy58040u pb-free pb-free bar-line indicator matte-sn notes: 1. contact factory for die availability. dice are guaranteed at t a = 25c, dc electricals only. 2. tape and reel. 3. pb-free package recommended for new designs. pin number pin name pin function 17, 15, in0, /in0 differential inputs: these input pairs are the differential signal inputs to the device. inputs accept 10, 8, in1, /in1 ac or dc-coupled signals as small as 100mv. each pin of a pair internally terminates to a vt pin 4, 2, in2, /in2 through 50?. note that these inputs will default to an indeterminate state if left open. please refer to 41, 39 in3, /in3 the input interface applications section for more details. 16, 9, vt0, vt1 input termination center-tap: each side of the differential input pair terminates to a vt pin. the vt 3, 40 vt2, vt3 pins provide a center-tap to a termination network for maximum interface fexibility . see input interface applications section for more details. 14, vref_ac0 reference voltage: this output biases to v cc C1.2v. it is used when ac coupling the inputs. 11, vref_ac1 connect vref-ac output pin to the vt input pin. bypass each vref-ac pin with a 0.01f low esr 1, vref_ac2 capacitor to v cc . see input interface applications section for more details. 42 vref_ac3 18 sin0 these single-ended ttl/cmos-compatible inputs address the data inputs. note that these inputs 19 sin1 are internally connected to a 25k? pull-up resistor and will default to a logic high state if left open. 38 sout0 these single-ended ttl/cmos-compatible inputs address the data outputs. note that these inputs 37 sout1 are internally connected to a 25k? pullup resistor and will default to a logic high state if left open. 5 conf, these single-ended ttl/cmos compatible inputs control the transfer of the addresses to the 7 load internal multiplexers. see address tables and timing diagram sections for more details. note that these inputs are internally connected to a 25k? pull-up resistor and will default to a logic high state if left open. confguration sequence 1. load: loads confguration into buffer, while confguration buffer holds existing switch confguration. 2. confguration: loads new confguration into the confguration buffer and updates switch confguration. buffer mode the sy58040u defaults to buffer mode (in-to-q) if the load and confguration control signals are foating. 23, 24, q0, /q0, differential outputs: these cml output pairs are the outputs of the device. please refer to the truth 26, 27, q1, /q1, table below for details. unused output pairs may be left open. each output is designed to drive 29, 30 q2, /q2, 400mv into 100? across the pair, or 50? to v cc . 32, 33 q3, /q3, 6, 22, 25, vcc positive power supply. bypass with 0.1f//0.01f low esr capacitors and place as close to each 28, 31, 34 v cc pin. 12, 13, 20, 21, gnd, ground. gnd and epad must both be connected to most negative potential of chip ground. 35, 36, 43, 44 exposed pad pin description 1 2 3 4 5 6 7 8 33 32 31 30 29 28 27 26 12 13 14 15 16 17 18 19 44 43 42 41 40 39 38 37 vref-ac2 /in2 vt2 in2 config vcc load /in1 /q3 q3 vcc /q2 q2 vcc /q1 q1 vt3 in3 vref-ac3 gnd gnd /in3 sout0 sout1 9 10 11 25 24 23 20 21 22 35 vt1 in1 vref-ac1 vcc /q0 q0 36 34 vcc gnd gnd vt0 /in0 vref-ac0 gnd gnd in0 sin0 sin1 vcc gnd gnd 44-pin mlf ? (mlf-44)
4 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) power supply voltage (v cc ) ....................... C0.5v to +4.0v input voltage (v in ) ........................................... C0.5v to v cc cml output voltage (v out ) .......... v cc C0.5v to v cc +5.0v termination current (3) source or sink current on vt pin ........................ 100ma input current (3) source or sink current on in, /in .......................... 50ma v ref-ac current (3) source or sink current on in, /in ............................ 2ma lead temperature (soldering, 20 sec.) ...................... 260c storage temperature range (t s ) ............ C65c to +150c operating ratings (2) power supply voltage (v cc ) ................. +2.375v to +3.60v ambient temperature range (t a ) .............. C40c to +85c package thermal resistance (4) mlf ? ( ja ) still-air ............................................................. 23c/w mlf ? ( jb ) junction-to-board ............................................. 12c/w symbol parameter condition min typ max units v cc power supply voltage v cc = 2.5v. 2.375 2.5 2.625 v v cc = 3.3v. 3.0 3.3 3.6 v i cc power supply current no load, max. v cc . 225 300 ma includes current from internal 50? pull-up on each output. r in input resistance (in-to-v t, /in-to-v t ) 45 50 55 ? r diff_in differential input resistance 90 100 110 ? (in-to-/in) v ih input high voltage note 6 v cc C1.6 v cc v (in-to-/in) v il input low voltage 0 v ih C0.1 v (in-to-/in) v in input voltage swing see figure 1a. 0.1 1.7 v (in-to-/in) v diff_in differential input voltage swing see figure 1b. 0.2 v |in C /in| v t_in in to v t (in-to-/in) 1.28 v v ref-ac output reference voltage v cc C1.3 v cc C1.2 v cc C1.1 v notes: 1. permanent device damage may occur if ratings in the absolute maximum ratings section are exceeded. this is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. due to the limited drive capability, use for input of the same package only. 4. package thermal resistance assumes exposed pad is soldered (or equivalent) to the device s most negative potential on the pcb. ja uses 4-layer in still-air number, unless otherwise stated. 5. the circuit is designed to meet the dc specifcations shown in the above table after thermal equilibrium has been established. 6. v ih (min) not lower than 1.2v. dc electrical characteristics (5) t a = C40c to +85c, unless otherwise stated.
5 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 v cc = 2.5v 5% or 3.3v 10%; t a = C40c to +85c; r l = 100? across each output pair, unless otherwise stated. symbol parameter condition min typ max units v oh output high voltage v cc C0.040 v cc C0.010 v cc v q, /q v out output differential swing see figure 1a. 325 400 mv q, /q v diff_out differential output voltage swing see figure 1b. 650 800 mv q, /q r out output source impedance 45 50 55 ? cml output dc e lectrical characteristics (7) v cc = 2.5v 5% or 3.3v 10%; t a = C40c to +85c, unless otherwise stated. symbol parameter condition min typ max units v ih input high voltage 2.0 v cc v v il input low voltage 0.8 v i ih input high current C125 30 a i il input low current v il = 0v. C300 a note: 7. the circuit is designed to meet the dc specifcations shown in the above table after thermal equilibrium has been established. lvttl/cmos dc e lectrical characteristics (7)
6 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 v cc = 2.5v 5% or 3.3v 10%; t a = C40c to +85c, r l = 100? across each output pair, unless otherwise stated. symbol parameter condition min typ max units f max maximum operating frequency nrz data 5 gbps v out 200mv clock 3 ghz t pd differential propagation delay in-to-q 150 225 350 ps config-to-q 500 ps t pw pulse width of load/config signal 1500 ps ?t pd tempco differential propagation delay 225 fs/c temperature coeffcient t s set-up time sin-to-load 800 ps sout-to-load 800 ps load-to-config 800 ps config-to-load 950 ps t h hold time load-to-sin, load-to-sout 800 ps t skew output-to-output skew note 9 25 ps part-to-part skew note 10 150 ps t jitter data random jitter (rj) note 11 1 ps rms deterministic jitter (dj) note 12 10 ps pp clock cycle-to-cycle jitter note 13 1 ps rms total jitter (tj) note 14 10 ps pp crosstalk-induced jitter note 15 0.7 ps rms t r , t f output rise/fall time at full output swing, 20% to 80%. 20 40 60 ps notes: 8. high-frequency ac-parameters are guaranteed by design and characterization. 9. output-to-output skew is measured between two different outputs under identical input transitions. 10. part-to-part skew is defned for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs 11. random jitter is measured with a k28.7 character pattern, measured at 7 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 typical operating characteristics v cc = 3.3v, gnd = 0, v in = 100mv, t a = 25c, unless otherwise stated. 320 340 360 380 400 420 440 0 2000 4000 6000 output amplitude (mv) frequency (mhz) output amplitude vs. frequency 235 240 245 250 255 260 265 270 -40 -20 02 04 06 08 0 100 propagation delay (ps) temperature ( c) propagation delay vs. temperature f = 2 00m hz 0 2 4 6 8 10 12 14 16 18 20 -40 -20 02 04 06 08 0 100 within device skew (ps) temperature ( c) within-device skew vs. temperature (referenced to q0) q0 q1 q2 q3
8 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 functional characteristics v cc = 3.3v, gnd = 0, v in = 100mv, t a = 25c, unless otherwise stated. 200mhz output time (200ps/di v .) output swing (100mv/div .) 622mhz output time (100ps/di v .) output swing (100mv/div .) 5gbps output (q C /q) time (50ps/di v .) output swing (200mv/div .)
9 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 single-e nded and differenti al swings v in , v ou t 400mv ( t yp.) figure 1a. single-ended voltage swing v diff_in , v diff_ou t 800mv ( t yp.) figure 1b. differential voltage swing timing diagram t s (sin-load) input address sin [1:0] output address sou t [1:0] load config /in [3:0] in [3:0] /q [3:0] q [3:0] t h (load-sin/sout) t s (sou t -load) t pw t s (config-load) t s (load-config) t pw t pd t pd (config-q) invalid (1) v alid (1) note: 1. invalid and valid refers to onfguation being changed. all outputs with unchanged confguration remain valid.
10 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 input and output stages 50? 50? v cc gnd /in v t in figure 2a. simplifed differential input stage 50? 50? v cc gnd q /q z o = 50? 100m a z o = 50? 100? figure 2b. cml dc-coupled (100? termination) 50? 50? v cc gnd q /q z o = 50? 100m a z o = 50? dc bias per application figure 2c. cml ac-coupled (50? termination)
11 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 input i nterface appli cations l vpec l in /in sy58040u v cc r pd r pd for 3.3 v , r pd = 100?. for 2.5 v , r pd = 50?. gnd gnd v t v ref-ac 0.01f v cc figure 3b. lvpecl interface (ac-coupled) l vds in /in nc nc sy58040u v cc gnd v t v ref-ac figure 3e. lvds interface cml in /in nc sy58040u v cc gnd v t v ref-ac nc option: may connect v t to v cc . figure 3c. cml interface (dc-coupled) 0.01f v cc cml in /in sy58040u v cc gnd v t v ref-ac figure 3d. cml interface (ac-coupled) l vpec l in /in sy58040u v cc 0.01f v cc r pd for v cc = 3.3 v , r pd = 50?. for v cc = 2.5 v , r pd = 19?. gnd v t v ref-ac nc figure 3a. lvpecl interface (dc-coupled) part number function data sheet link sy58040u ultra precision 44 cml crosspoint switch http://www.micrel.com/product-info/products/sy58040u.shtml with internal input/output termination mlf ? application note www.amkor.com/products/notes_paper/mlf_appnote.pdf hbw solutions new products and applications www.micrel.com/product-info/products/solutions.shtml related micrel products and support documentation
12 sy58040u micrel, inc. m9999-103009 hbwhelp@micrel.com or (408) 955-1690 micrel, inc. 2180 fortune drive san jose, ca 95131 usa t e l + 1 (408) 944-0800 f a x + 1 (408) 474-1000 w e b http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is assumed by micrel for its use. micrel reserves the right to change circuitry and specifcations at any time without notifcation to the customer . micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a signifcant injury to the user . a purchasers use or sale of micrel products for use in life support appliances, devices or systems is at purchasers own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2005 micrel, incorporated. 44-pin microleadframe ? (mlf-44) p a c kage ep- exposed p ad die compside island heat dissipation he a vy copper plane he a vy copper plane v ee v ee heat dissipation pcb thermal consideration for 44-pin mlf ? package (always solder, or equivalent, the exposed pad to the pcb) package notes: 1. package meets level 2 qualifcation. 2. all parts are dry-packaged before shipment. 3. exposed pads must be soldered to a ground for proper thermal management.


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